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- Path: sojourn1.sojourn.com!not-for-mail
- From: mharrell@sojourn1.sojourn.com (Matt Harrell)
- Newsgroups: comp.sys.amiga.misc
- Subject: Re: Speed: 68040 vs. 68060
- Date: 15 Mar 1996 21:45:15 GMT
- Organization: Sojourn Systems Ltd.
- Distribution: world
- Message-ID: <4icodb$gu@tkhut.sojourn.com>
- References: <2924579182@tkhut.sojourn.com>
- NNTP-Posting-Host: sojourn1.sojourn.com
- X-Newsreader: TIN [UNIX 1.3 941216BETA PL0]
-
- Markku Kolkka (mk59200@proffa.cc.tut.fi) wrote:
- : >>>>> "Matt" == Matt Harrell <mharrell@sojourn1.sojourn.com> writes:
- : > It allows simultaneous execution of two integer
- : > instructions (or an integer and a float instruction) and one
- : > branch instruction during each clock period. All integer
- : > arithmetic or logical instructions are able to perform an
- : > embedded load/store operation
- : This is a really devious marketroid way to inflate the MIPS claims:
- : they count an operation like ADD.x <ea>,Rn as TWO operations because
- : of the "embedded load". Of course a RISC CPU would need two
- : instructions for this, but I think this is just another reason to
- : forget all MIPS values as meaningless marketing hype.
-
- : --
- : Markku Kolkka
- : mk59200@cc.tut.fi
-
- I did not actually write the above quote. It is a quote from the
- Motorolla press release that I posted here. Please be more careful
- when "quoting" posts.
-
- --
- -----========++++++++++********************++++++++++========-----
- Matt Harrell Amiga 1200 running AmigaOS3.0
- Lansing, MI U.S.A. CSA 12 Gauge 030/882RC@50MHz/SCSI
- mharrell@sojourn.com 2MB chip/18MB fast RAM
- 240MB IDE hard disk
- -----========++++++++++********************++++++++++========-----
-